Oberon RTK

Change Note 2024-02-10

Inter-core messaging, new example program.

Module Messages

  • Added infrastructure to exchange messages between threads on different processor cores.
  • Description: [Inter-core Messages]({{<relref "/concepts/architecture/inter-core-messages">}}).
  • Module [Messages]({{<relref "/docs/lib/kernel-v1/messages-v1">}})
  • Example program: [Messaging]({{<relref "/docs/examples/v1/messaging">}})

Module Kernel

  • Re-implementation of the scheduler, unchanged logic.

Module MultiCore

  • The transfer procedures now use a parameter of type ARRAY 4 OF BYTE in lieu of INTEGER.

Module Terminals

  • Added a separate Texts.Writer for error messages.

Main Modules

  • Each example program has now its own main module.
  • This shields the example program from changes to the library module.

New Example Program

  • [Messaging]({{<relref "/docs/examples/v1/messaging">}})

Last updated: 10 February 2024